1. Field Of The Invention
The present invention relates to antifuse technology. More particularly, the present invention relates to structures and methods for determining the resistance of antifuses disposed in a circuit containing an array of antifuses, such as a field programmable gate array product.
2. The Prior Art
In a typical integrated circuit containing an array of rows and columns of functional circuits, a user-programmable interconnect architecture usually comprises a network of rows and columns of interconnect conductors which may be selectively connected to one another and to inputs and outputs of the functional circuits by programming user-programmable antifuse elements. To program a selected antifuse element, that element is addressed by programming circuitry contained on the integrated circuit, and a programming voltage potential (usually designated as V.sub.pp) is placed across the antifuse to create a low-impedance electrical path through it.
The selection of antifuses to program and the antifuse programming process are known in the art, but briefly, the programming potential V.sub.pp is usually supplied to an I/O pin of the integrated circuit. Information identifying a programming circuit path for the selected antifuse is provided to the integrated circuit, usually by clocking it as a serial bit stream into a serial shift register chain in the integrated circuit. After the antifuse-identifying information is clocked into the shift register it is used to steer the V.sub.pp potential and a reference potential (usually ground) to the selected antifuse by turning on one or more transistors which are sometimes referred to as pass transistors. An exemplary antifuse programming architecture is disclosed in U.S. Pat. No. 4,758,745 to El Gamal et al.
After antifuses in an integrated circuit have been programmed, it is advantageous to have the capability to determine the resistance of the programmed antifuses. Knowledge of the as-programmed resistance of an antifuse is useful for determining when to stop the programming procedure, for device design, process monitoring, binning (the sorting of devices according to speed performance) and other purposes.
Unfortunately, direct measurement of antifuse resistance is difficult, if not impossible. The antifuse to be measured is rarely, if ever, electrically located adjacent to any of the I/O pins of the integrated circuit, and the packaging provided over the integrated circuit die rules out the possibility of internally probing the integrated circuit to directly measure antifuse resistance.
Indirect measurements of antifuses have been made during the antifuse programming process by monitoring the current drawn from the programming voltage power supply. Examples of this technique are found in U.S. Pat. No. 5,008,855 to Eltoukhy et al. and U.S. Pat. No. 5,126,282 to Chiang et al. These methods give only an indirect measurement of the resistance of the antifuse itself, since the resistance of other elements in the programming path contribute to the total resistance which draws current from the programming voltage power supply during antifuse programming.
U.S. Pat. No. 5,293,133 to Birkner et al. discloses a method for determining antifuse resistance where a transistor is placed in parallel with an antifuse. Prior to programming the antifuse, the transistor is turned on and the current through the transistor is measured. This measurement allows calculation of the programming path resistance. After the antifuse is programmed, first the transistor is turned off and the current through the antifuse is measured. This measurement allows the resistance of the programming path including the antifuse to be measured. Then the transistor is turned on and the current through the parallel combination of the antifuse and the transistor in the programming path is measured. This information allows determination of the individual resistances of the transistor, the antifuse, and the programming path.
While this scheme allows measurement of antifuse resistance, it is limited to circuit arrangements in which there is a transistor in parallel with the antifuse. In many practical circuit configurations employing antifuses, this circuit arrangement is not possible.
There exists a need for circuitry and a method for more accurately measuring antifuse resistance after the antifuse is programmed.
It is an object of the present invention to provide circuitry which may be disposed on an integrated circuit along with an antifuse array and which will allow the resistance of programmed antifuses to be measured more accurately than is possible in the prior art.
It is another object of the present invention to provide a method for measuring the resistance of programmed antifuses to be measured more accurately than is possible in the prior art.